EDN

Test solutions to confront silent data corruption in ICs

While semiconductor design engineers become more aware of silent data corruption (SDC) or silent data errors (SDE) caused by aging, environmental factors, and other issues, embedded test solutions are ...
EDN

ATI 90nm Graphics MPU Leverages Embedded Deterministic Test

ATI Technologies Inc. reported that it has implemented an embedded deterministic test (EDTTM) tool from Mentor Graphics Corp. in the testing of a new 90nm graphics processor. The Modular TestKompress ...
Semiconductor Engineering

Using High-Quality Deterministic Patterns For In-System/In-Field Testing

Logic BIST (LBIST) is a well-stablished traditional solution for meeting automotive testing standards. However, using pseudo-random LBIST patterns can be challenging when trying to achieve ...
Electronic Design

Design-For-Test The Smart Way: dFT With A "Big T" And A "Little d"

Design-for-test, or DFT, should facilitate high-quality test, not change the design. Test techniques and strategies need to supply a high-quality test that screens out defective devices, avoiding ...
Electronic Design

Design for Test: ATPG keeps pace with design complexity

Automatic test-pattern generation (ATPG) has played a key role in semiconductor logic test, but several trends driving the need for semiconductor test quality are challenging traditional ATPG tools.
Semiconductor Engineering

Making The Most of Test Resources

Semiconductor testing is undergoing multiple paradigm changes at once with the common goals of producing more known good die per month with low test cost. Achieving these goals requires a delicate ...